In the name of ALLAH, the most beneficient, the most merciful

Advance Computer Architecture (CS501)

Multiple Choice Questions (MCQs)

Objective Questions

  1. An ________ is a program that takes basic computer instructions and converts them into a pattern of bits that the computer's processor can use to perform its basic operations.

    1. Assembler
    2. Debugger
    3. Editor
    4. Console
  2. In which one of the following addressing modes, the operand does not specify an address but it is the actual data to be used.

    1. Direct
    2. Indirect
    3. Immediate
    4. Relative
  3. CS501_0001.jpg
    In this figure, the constant value specified by the immediate field is added to the register value, and the resultant is the index of memory location that is referred i.e. Effective Address = A + (content of R) . Identify the addressing mode.

    1. Displacement
    2. Immediate
    3. Indexed
    4. Relative
  4. In ________ address mode, the actual data is stored in the instruction.

    1. Direct
    2. Indirect
    3. Immediate
    4. Relative
  5. Which one of the following registers store a previously calculated value or a value loaded from the main memory?

    1. Accumulator
    2. Address Mask
    3. Instruction Register
    4. Program Counter
  6. Which field of the machine language instruction is the “type of operation” that is to be performed?

    1. Op-code
    2. CPU registers
    3. Memory cells
    4. I/O locations
  7. An instruction that specifies one operand in memory and one operand in a register would be known as a ________ address instruction.

    1. 2-1/2
    2. 1-1/2
    3. 0
    4. 2
  8. Which one of the following instructions is used to load register from memory using a relative address?

    1. la
    2. lar
    3. ldr
    4. str
  9. Which one of the following is an address (binary bit pattern) issued by CPU?

    1. Memory
    2. Effective
    3. Base
    4. Nex t instruction
  10. The instruction ________ will load the register R3 with the contenets of the m\emory location M [PC+56]

    1. Add R3, 56
    2. lar R3, 56
    3. ldr R3, 56
    4. str R3, 56
  11. Which instruction is used to store register to memory using relative address?

    1. ld instruction
    2. ldr instruction
    3. lar instruction
    4. str instruction
  12. Type A of SRC has which of the following instructions?

    1. andi, instruction
    2. No operation or nop instruction
    3. lar instruction
    4. ldr instruction
    5. Stop operation or stop instruction

    1. 1 & 2
    2. 2 & 3
    3. 3 & 5
    4. 2 & 5
  13. Which one of the following languages presents a simple, human-oriented language to specify the operations, register communication and timing of the steps that take place within a CPU to carry out higher level (user programmable) instructions?

    1. Assembly Language
    2. OOP(Object Oriented Language)
    3. RTL (Register Transfer Language)
    4. UML(Unified Modeling language)
  14. What does the RTL expression [M(1234)] means?

    1. The contents of memory whose address is 1234.
    2. The contents of data register 1234
    3. The effective address of register 1234
    4. The address of memory whose address is 1234.
  15. Which one of the following is a binary cell capable of storing one bit of information?

    1. Decoder
    2. Flip-flop
    3. Multiplexer
    4. Diplexer
  16. Which one of the following is a bi-stable device, capable of storing one bit of information?

    1. Decoder
    2. Flip-Flop
    3. Multiplexer
    4. Diplexer
  17. Which type of instructions load data from memory into registers, or store data from registers into memory and transfer data between different kinds of special-purpose registers?

    1. Arithmetic
    2. Control
    3. Data transfer
    4. Floating point
  18. Which one of the following portions of an instruction represents the operation to be performed?

    1. Address
    2. Instruction code
    3. Opcode
    4. Operand
  19. Which type of instructions enables mathematical computations?

    1. Arithmetic
    2. Control
    3. Data transfer
    4. None of the given
  20. Which one of the following is the memory organization of EAGLE processor?

    1. 8-bits
    2. 16-bits
    3. 32-bits
    4. 64-bits
  21. Which type of instructions help in changing the flow of the program as and when required?

    1. Arithmetic
    2. Control
    3. Data transfer
    4. Floating point
  22. What is the instruction length of the FALCON-E processor?

    1. 8 bits
    2. 16 bits
    3. 32 bits
    4. 64 bits
  23. What is the instruction length of the FALCON-A processor?

    1. 8-bits
    2. 16-bits
    3. 32-bits
    4. 64-bits
  24. What is the instruction length of the SRC and Falcon E processor?

    1. 8 bits
    2. 16 bits
    3. 32 bits
    4. 64 bits
  25. Which one of the following registers holds the address of the next instruction to be executed?

    1. Accumulator
    2. Address Mask
    3. Instruction Register
    4. Program Counter
  26. FALCON-A processor bus has 16 lines or is 16-bits wide while that of SRC ________ wide.

    1. 8-bits
    2. 16-bits
    3. 32-bits
    4. 64-bits
  27. For any of the instructions that are a part of the instruction set of the SRC, there are certain _________required which may be used to select the appropriate function for the ALU to be performed, to select the appropriate registers, or the appropriate memory location.

    1. Register
    2. Control signals
    3. Memory
    4. None of the given
  28. ________ control signal enable the input to the PC for receiving a value that is currently on the internal processor bus.

    1. LPC
    2. INC4
    3. LC
    4. I
  29. ________ operation is required to change the processor’s state to a known, defined value.

    1. Change
    2. Reset
    3. Update
    4. None of the given
  30. When is the “Divide error interrupt" generated?

    1. When an attempt is made to divide by decimal number
    2. When an attempt is made to multiply by zero
    3. When an attempt is made to divide by zero
    4. When negative number is stored in a register
  31. What should be the behavior of interrupts during critical sections?

    1. Must remain disable
    2. Must remain Enable
    3. Can be either enable or disable
    4. only important interrupts be enable
  32. A user program has to delete a file. The user program will be executing in the user mode. When it makes the specific system call to delete the file, an interrupt will be generated, this will cause the processor to halt its current activity and switch to supervisor mode. Once in supervisor mode, the operating system will delete the file and then control will return to the user program. This is an example of

    1. Hardware interrupt
    2. Software interrupt
    3. Exception
    4. All of the given
  33. ________ is/a re defined as the number of instructions processed per second.

    1. Throughput
    2. Latency Time to process 1 request.
    3. Throughput and Latency
    4. None of the given